Analog Design Intern - MS
Marvell · Hardware
- Location
- Santa Clara, CA · Burlington, VT
- Metro
- San Francisco Bay Area
- Workplace
- Unspecified
- Level
- Intern
- Type
- Internship
- Posted
- 2 months ago
- Source
- Simplify internships list
Read the full posting & apply ↗
What the posting covers
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can…
Your Team, Your Impact
The Central Engineering Test Chip Development team provides hardware validation for custom SRAM, logic, I/O, and security circuits across Marvell business units in advanced semiconductor technology nodes. The team designs and develops test chips, establishes…
What You Can Expect
Design and verify test chip experiments using Verilog simulation. Develop, generate, simulate, and debug Verilog-based test patterns for hardware validation of test chip experiments. Develop and maintain laboratory environments that support hardware debug,…
What We're Looking For
Currently enrolled in a Master’s Degree in MSEE, MSCE, or a related field with an expected graduation date of Fall 2027 – Summer 2028. Strong understanding of digital logic circuits, memory architectures, I/O circuits, and semiconductor device physics. Proven…
Expected Base Pay Range (USD)
38 - 76, $ per hour. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market…
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to…
Excerpts only. The employer’s page has the complete posting.